"Lec 14 - CMOS Process Variations: A Critical Operation Point Hypothesis" April 2, 2008 lecture by Janak H. Patel for the Stanford University Computer Systems Colloquium (EE380). Prevailing understanding of a chip's behavior under large process variations with statistical delay assumptions leads one to conclude that a small number of errors are likely as we progress further down on Moore's Law. This understanding is challenged by a new hypothesis which states that in every large CMOS chip, there exist critical operations points (frequency, voltage, temperature) such that it divides the 3-D space in to two distinct spaces: Error-free operation and Massive errors. EE380 | Computer Systems Colloquium: http://www.stanford.edu/class/ee380/ Stanford Computer Systems Laboratory: http://csl.stanford.edu/ Stanford Center for Professional Development: http://scpd.stanford.edu/ Stanford University: http://www.stanford.edu/ Stanford University channel on YouTube: http://www.youtube.com/stanford/
Video is embedded from external source so embedding is not available.
Video is embedded from external source so download is not available.
Channels: Computer Science
Tags: science electrical engineering math technology computer chip circuit design statistical process variations functional testing speed-binning management
Uploaded by: stanfordcompsys ( Send Message ) on 03-09-2012.
Duration: 63m 58s
No content is added to this lecture.
This video is a part of a lecture series from of stanford
Lec 1 - The PeakStream Platform for Many-Core Computing
Lec 2 - Programmable Micofluidics
Lec 3 - Open Source Study: Analytics, Economics & Best Practices
Lec 4 - Self-Improving Artificial Intelligence
Lec 5 - The Challenges of Implementing MatlabĀ®
Lec 6 - Parallel Programming 2.0
Lec 7 - On the Road to Computer Literacy
Lec 8 - Android: Building a Mobile Platform to Change the Industry
Lec 9 - Science Communication, Science Literacy and Public Support
Lec 10 - Tracking the Internet into the 21st Century
Lec 11 - Computing in Transition
Lec 12 - Scalable Parallel Programming with CUDA on Manycore GPUs
Lec 15 - Demonstration of Brain Computer Interface Using the Emotive Epoc
Lec 16 - A Head in the Cloud: The Power of Infrastructure as a Service
Lec 17 - Distributed Systems: Computation With a Million Friends
Lec 18 - Dynamic Languages Strike Back
Lec 19 - The Challenge of Small Form Factor: The ASUS Eee PC
Lec 20 - Spookytechnology and Society
Lec 21 - The Search for Jim Gray
Lec 22 - The Role of Accelerated Computing in the Multi-Core Era